Method and apparatus for high voltage level shifting
US5539334A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1992 |
| Grant date | Jul 23, 1996 |
| Priority date | — |
| Expiry date | Dec 16, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356113
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage level shifter circuit (10) for outputting an output high (18) and output low (18) signal is provided which accommodates multiple power supplies (12 and 22) at different relative voltage to each other. The voltage level shifter (10) includes an input stage (24) which is characterized by voltage ranges applicable to the process used to make the circuit. The voltage level shifter circuit includes an output stage (18) which is also characterized by the same voltage ranges which cannot be exceeded. The output stage outputs the translated output high (16) and output low (18) voltage signals. A clamping network (20) is employed to ensure that the output stage voltage ranges are not exceeded. The present invention implements a high voltage level shifter (10) using low voltage components by extending the breakdown capability of the voltage level shifter circuit (10) past the breakdown voltage of any single component in the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.