Laminated multi chip module interconnect apparatus
US5541368A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 15, 1994 |
| Grant date | Jul 30, 1996 |
| Priority date | — |
| Expiry date | Jul 15, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1394
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
To facilitate the reworking of a multi-tiered circuit board and a laminated multi chip module, a chip module apparatus having a substrate portion is provided. The chip module has first and second opposite sides with vias extending therethrough. Deposited on both sides of the module by conventional processes is a layer of copper. A first mask is applied to the copper layer to expose a copper, electrical circuit pattern. A second mask having holes therein that are offset from the vias is placed over the first mask by conventional processes. Formed on at least one of the chip module's side in the second mask's holes are a spaced series of an solder BGAs, which have melting point temperatures substantially greater than the phase transition temperature of the chip module's substrate portion. The BGA's are formed on the chip module by an electrochemical plating process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.