Method and apparatus for storing control information in multi-bit non-volatile memory arrays
US5541886A · kind A · utility
257Cited by
1References
10Claims
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Key dates
| Filing date | Dec 27, 1994 |
| Grant date | Jul 30, 1996 |
| Priority date | — |
| Expiry date | Dec 27, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory array circuit including a plurality of non-volatile memory cells adapted to selectively store data in either single bit mode or a multi-bit mode, control circuitry for causing control information data to be stored in first preselected ones of the plurality of cells and other data to be stored in other preselected ones of the plurality of cells, and circuitry for accessing the plurality of cells to read, program and erase the cells, the accessing circuitry functioning to access cells for storing control information data in single bit mode and cells for storing other data in either single bit or multi-bit mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.