Bridge interface between two buses of a computer system with a direct memory access controller programmed by a scatter/gather programmer
US5542053A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 1994 |
| Grant date | Jul 30, 1996 |
| Priority date | — |
| Expiry date | Nov 30, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A bridge interface for a computer system having an industry standard architecture (ISA) bus and a peripheral controller interconnect (PCI) bus is coupled between the ISA and PCI buses. The bridge has a direct memory access (DMA) control circuit programmable by programming signals to perform a DMA transfer, and a scatter/gather unit coupled between the ISA bus and the DMA control circuit. The scatter/gather unit selectively provides the programming signals to the DMA control circuit directly or causes the programming signals to be provided over the ISA bus. Providing the programming signals to the DMA control circuit directly from the programming controller of the scatter/gather unit takes advantage of the location of both the DMA control circuit and the scatter/gather unit on the bridge chip. The program controller is able to program the DMA control circuit with I/O write cycles that take only one 33 MHz clock, instead of a plurality of 8 MHz clocks if the DMA control circuit is programmed with signals sent over the ISA bus. This provides an order of magnitude reduction is the time required to program the DMA control circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.