Method of manufacturing a semiconductor photonic integrated circuit
US5543353A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1994 |
| Grant date | Aug 6, 1996 |
| Priority date | — |
| Expiry date | Jul 29, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/2077
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A semiconductor photonic integrated circuit and a manufacturing method thereof involving a selective-area growth technique using a set of insulating film patterning masks formed on a semiconductor substrate. The mask width and the mask-to-mask open space width are variable but numerically limited. A single crystal growth process is carried out to form on the same substrate a plurality of contiguous bulk semiconductor layers or quantum well layers differing from one another in terms of growth layer thickness or composition. The differences in energy level between these layers are utilized so that semiconductor photonic integrated devices of different functions are formed on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.