Daisy chained clock distribution scheme
US5546023A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1995 |
| Grant date | Aug 13, 1996 |
| Priority date | — |
| Expiry date | Jun 26, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A daisy chained clock distribution scheme for distributing a clock signal from a central communications clock driver to the nodes of a massively parallel multi-processor computer or supercomputer. The daisy chained clocking scheme is implemented using point-to-point clock distribution of a differential clock signal to the communication nodes of a plurality of processors in a multicomputer system or to components connected to a common bus in a high speed microprocessor system. Differential signaling is employed wherein the differentiality is maintained including through silicon. In an alternate embodiment, the clock pulse is also regenerated in each node component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.