Circuit arrangement for driving an MOS field-effect transistor
US5546043A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 7, 1994 |
| Grant date | Aug 13, 1996 |
| Priority date | — |
| Expiry date | Nov 7, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/009
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In order to drive an MOS field-effect transistor as a voltage interrupter in a DC/DC converter operating on the chopper principle, a suitable circuit arrangement has an input transistor (T1) for current control on the input side with a low voltage change, a downstream phase reversing transistor (T2) and a complementary stage formed from a first and a second further transistor (T3, T4) whose collectors are interconnected. An auxiliary voltage is applied which is raised to the input voltage to be regulated. The complementary stage switches without any overlap by means of different current switching thresholds for the first further transistor (T3) and the phase reversing transistor (T2) which drives the second further transistor (T4). In addition, it switches with a switch-on delay, so that the switched-on duration of an upstream switched-mode regulator chip can be increased to 100%. The internal current consumption of the circuit arrangement is in this case low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.