Nonvolatile control architecture
US5548550A · kind A · utility
5Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 1995 |
| Grant date | Aug 20, 1996 |
| Priority date | — |
| Expiry date | Feb 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R25/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory, includes multiple nonvolatile registers with each nonvolatile register including memory cells, and further includes circuitry that writes information to each of the nonvolatile registers one at a time, in a rotating order to prolong the prevention of tunneling oxide breakdown.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.