Patent · US Expired

Intelligent bus bridge for input/output subsystems in a computer system

US5548730A · kind A · utility

154Cited by
6References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 20, 1994
Grant dateAug 20, 1996
Priority date
Expiry dateSep 20, 2014

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4027
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An intelligent bus bridge contained in a single integrated circuit chip is disclosed along with computer systems and server systems that employ intelligent input/output subsystems. The intelligent bus bridge includes a local processor coupled for communication over a local component bus, a local memory controller that enables access to a local memory from the local component bus, and a component bus bridge that propagates accesses between the local component bus and a system component bus. The single integrated circuit chip enables dual-porting of the local memory controller without significant increases in input/output pins. A mode control input to the intelligent bus bridge indicates whether the intelligent bus bridge functions in a local master mode or a host master mode in a computer or server system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.