IC memory card system having a host processor selectively operable with an IC memory card including either an SRAM or an EEPROM
US5548741A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 13, 1995 |
| Grant date | Aug 20, 1996 |
| Priority date | — |
| Expiry date | Feb 13, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An IC (Integrated Circuit) memory card system is provided having a host processor and an IC memory card capable of storing picture data or similar data. When the host processor rewrites data stored in the memory card, the processor sends an erase signal together with state signals to the memory card with no regard to the type of a memory built in the latter, i.e., an SRAM (Static Random Access Memory) or an EEPROM (Electrically Erasable Programmable Read Only Memory). The memory card with an EEPROM erases data in response to the erase signal, while the memory card with an SRAM awaits data from the host processor by neglecting the erase signal. During the erasure, the memory card with an EEPROM continuously sends a busy signal to the host processor to cause the host processor to temporarily stop sending data. On completing the erasure, the memory card cancels the busy signal, receives data from the host processor, and writes data in. In the case of the memory card with an SRAM which does not send the busy signal, the host processor continuously sends data thereto without interruption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.