Image filtering with an efficient implementation of high order decimation digital filters
US5550764A · kind A · utility
2Cited by
10References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 30, 1995 |
| Grant date | Aug 27, 1996 |
| Priority date | — |
| Expiry date | Mar 30, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0664
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A decimator for effecting a X:1 decimation, where X=is any positive integer greater than 1, comprising a FIR filter for receiving and filtering an input stream of data bits and in response generating a like number of filtered output data bits; and a hold circuit for sampling and outputting every Xth one of the filtered output data bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.