Method for designing low profile variable width input/output cells
US5552333A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1994 |
| Grant date | Sep 3, 1996 |
| Priority date | — |
| Expiry date | Sep 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/998
Abstract
An apparatus and method of (input/output) I/O design, utilizing a predetermined relationship, whereby the outer ring area of an integrated circuit die are set aside for the I/O circuits which are contained in I/O cells. The height of the I/O cell is first reduced from the prior art cell heights, and the width of the cell is then varied according to the particular need of the circuit. When the drive strength of the I/O circuit is high, and the circuit is more complicated, a wider cell is assigned. Conversely, for a circuit that is relatively simple, a narrower cell will be assigned. Each I/O cell has one associated bonding pad which is placed directly below the starting point of that cell. The height of the cells may also be varied on each side of the chip in order to be able to place more I/O cells along one or more sides or edges of the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.