Method and apparatus for controlling parallel port drivers in a data processing system
US5553306A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1994 |
| Grant date | Sep 3, 1996 |
| Priority date | — |
| Expiry date | Sep 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel port interface for utilization between a first device and a second device designated by a user for transmitting a digital signal from the device to the second device. The parallel port interface includes a switchable driver circuit for transmitting the digital signal, which includes a first circuit for emulating an open collector circuit and a second circuit for emulating a totem pole circuit. The switchable driver circuit is controlled by a logic control circuit that automatically selects either the first circuit or the second circuit for transmitting the digital signal in response to the digital signal and a designation of the second device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.