Component video signal to composite video signal encoding system, control system and method
US5555030A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1993 |
| Grant date | Sep 10, 1996 |
| Priority date | — |
| Expiry date | Jan 5, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N11/20
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a component video signal to composite video signal encoding system (10), the component input signals are stored in a first in, first out (FIFO) memory. The FIFO memory is connected by 1 luminance and 2 chrominance outputs to a rate converter, which increases the digital sampling rate of the signals as received from the FIFO memory. The rate converter is in turn connected by 1 luminance and 2 chrominance outputs to luminance and chrominance processing circuits. The luminance and chrominance processing circuits produce the composite video signals, and are connected to a D2 standard driver circuit. The output of the D2 driver circuit is D2 standard digital component signals. The luminance and chrominance processing circuits are also connected to a digital to analog (D/A) converter. The output of the D/A converter is an analog or NTSC component video signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.