Multiprocessing system including gating of host I/O and external enablement to guest enablement at polling intervals
US5555414A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1994 |
| Grant date | Sep 10, 1996 |
| Priority date | — |
| Expiry date | Dec 14, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system operating under a multiprocessing hypervisor program subject to I/O interrupts during a polling interval of the hypervisor program includes one or more processors for executing the hypervisor program and host system and one or more guest systems under the hypervisor program, a storage system connected to the processor's by a bus for storing instructions, data and control information associated with the systems being executed by the processor, the storage system may be partitioned into a number of separate areas each associated with one of the concurrently operating systems, an input/output subsystem for generating I/O interrupts to the processors, apparatus for testing to determine if the system is operating in an interpretive execution mode, apparatus for determining whether a dedicated region facility is active, apparatus for testing whether an I/O enablement mask for a guest system has been set, apparatus for setting a flag if the guest system I/O enablement mask is set, apparatus for testing the flag during each polling interval of the interpretive execution mode, apparatus for loading a control byte from a host control register into a hardware register…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.