Pulsed flip-flop circuit
US5557225A · kind A · utility
48Cited by
6References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1994 |
| Grant date | Sep 17, 1996 |
| Priority date | — |
| Expiry date | Dec 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/037
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flip-flop circuit is described. The flip-flop circuit receives the data signal from a data input, receives a trigger signal from a trigger input, generates a pulse signal in response to an edge in the trigger signal, and stores the data signal in response to the pulse. Alternatively, the flip-flop circuit receives a data signal through a data input, receives a trigger signal through a trigger input, stores the data signal in a latch, and suppresses the trigger signal to the latch when the data signal stored in the latch corresponds to the data signal received through the data input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.