Direct conversion receiver for multiple protocols
US5557642A · kind A · utility
177Cited by
8References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 14, 1994 |
| Grant date | Sep 17, 1996 |
| Priority date | — |
| Expiry date | Nov 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/26
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A novel direct conversion receiver utilizing a sample and hold circuit for subsampling the input signal. The output of the sample and hold circuit is applied to a sigma-delta loop to provide a high speed low resolution data stream which in turn is applied to a decimator which provides a high precision, low data rate signal having quadrature outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.