Process for manufacturing a silicon chip with an integrated magnetoresistive head mounted on a slider
US5559051A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1994 |
| Grant date | Sep 24, 1996 |
| Priority date | — |
| Expiry date | Dec 23, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49041
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process of making an MR head having its MR stripe protected from electro-static discharge (ESD) on a slider, such as titanium carbide. The MR stripe is protected by a plurality of silicon integrated circuit devices which conduct ESD-induced current from the MR stripe to larger components in the MR head such as the first and second shield layers and the coil layer. In a preferred embodiment the integrated circuit devices and interconnects are constructed in a single crystal silicon chip. The silicon chip is fixedly mounted to a trailing edge of the slider and the MR head is mounted on a trailing edge of the silicon chip adjacent the integrated circuit devices. The invention includes a method of mass producing sliders by combining thin film technology for making MR heads with integrated circuit technology for making integrated circuit devices. These technologies are combined at the row level to ultimate completion of individual sliders. A silicon wafer, including the integrated circuit devices, is sliced into a plurality of silicon bars, each bar including a row of circuit devices. A plurality of rows and columns of MR heads are constructed on a ceramic wafer. The ceramic wafer is …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.