Double-balanced mixer circuit
US5559457A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1994 |
| Grant date | Sep 24, 1996 |
| Priority date | — |
| Expiry date | Mar 21, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0088
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A double-balanced mixer circuit which consumes less power, and is capable of operating on a low voltage power source, because an output of a first signal having a phase lag of 90.degree. from a first frequency signal and an output of a second signal having a phase lead of 90.degree. over the first frequency signal are provided by means of a first phase shifter, an output of a third signal having a phase lag of 90.degree. from a second frequency signal and an output of fourth signal having a phase lead of 90.degree. over the second frequency signal are provided by means of a second phase shifter, thereby generating a radio frequency signal by mixing the first signal and the third signal in a first dual gate circuit, and generating a radio frequency signal by mixing the second signal and the fourth signal in a second dual gate circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.