Complaint layer metallization
US5559817A · kind A · utility
24Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 23, 1994 |
| Grant date | Sep 24, 1996 |
| Priority date | — |
| Expiry date | Nov 23, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/0237
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A compliant layer metallization for relieving thermal and mechanical stress developed between a semiconductor and a semiconductor submount. The compliant layer metallization includes a compliant layer, a wetting layer and a barrier layer. The compliant layer provides thermal and mechanical stress relief. The wetting layer ensures adequate wetting during soldering. The barrier layer prevents diffusion of bonding material into the compliant layer and/or into the semiconductor during solder-bonding. The compliant layer metallization design promotes ease of manufacturing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.