Scalable parallel processing systems wherein each hypernode has plural processing modules interconnected by crossbar and each processing module has SCI circuitry for forming multi-dimensional network with other hypernodes
US5560027A · kind A · utility
31Cited by
9References
16Claims
0Family size
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Key dates
| Filing date | Dec 15, 1993 |
| Grant date | Sep 24, 1996 |
| Priority date | — |
| Expiry date | Dec 15, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17381
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing system 100 is provided which includes first and second hypernodes 101, each of the hypernodes 101 having at least first and second coherent interfaces 106. At least first and second interconnect network 107 are provided, the first network 107 coupling the first interfaces 106 of the first and second hypernodes 101 and the second interconnect network 107 coupling the second interfaces 106 of the first and second hypernodes 101.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.