Programmable mixed-mode integrated circuit architecture
US5563526A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 1994 |
| Grant date | Oct 8, 1996 |
| Priority date | — |
| Expiry date | Jan 3, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable mixed-mode circuit (180) has both digital (215,217) and analog (120,120',120") circuit portions. The digital portion (215,217) is provided by programmable digital logic. The analog portion (120,120',120") has a variety of analog circuits, including voltage references (218), high-speed comparators (208,209) and circuits (80) that are selectively configurable to provide operational amplifier or comparator functions. The analog circuits (122-125) are interconnected by programmable switch elements (128-131,160-167) so that the connection of the analog circuits to one another, to input or output pins (A0-A3,B0-B3,C0-C3) and to the digital circuitry (215,217) can be programmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.