CPU activity monitoring through cache watching
US5564015A · kind A · utility
91Cited by
5References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 28, 1995 |
| Grant date | Oct 8, 1996 |
| Priority date | — |
| Expiry date | Dec 28, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A central processing unit ("CPU") activity monitor and method provides CPU activity information. The CPU activity monitor includes a timer and an activity event counter for receiving a plurality of mode signals from the CPU, a cache miss signal from a cache memory system, and a clock signal from a clock. An activity-to-inactivity value defines when the CPU transitions from an active state to an inactive state. An activity threshold defines when the CPU transitions from an inactive state to an active state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.