Transfer control apparatus for independent transfer of data from a storage device to an I/O device over a secondary bus
US5566306A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 20, 1995 |
| Grant date | Oct 15, 1996 |
| Priority date | — |
| Expiry date | Dec 20, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data transfer control apparatus capable of continuously transferring large amounts of data without decreasing the performance of a system CPU. The data transfer control apparatus uses one or more external storage device interfaces to control transfer of data to or form such storage devices, buffer memory interfaces to control transfer of data to and from one or more buffer memory devices, other system and data processing device interfaces, and at least one arbitration unit which controls access to buffer memory data storage. The arbitration element is programmable in response to one or more stored priority values or command signals, and can alter system response to requests for data transfer without accessing the CPU. Data can be efficiently distributed to among devices, including such output devices as televisions having periodic display and non-display periods, or other display devices requiring data on an irregular basis. The result is an increase in system performance for multimedia devices, TV game machines, etc., which require the transfer of large amounts of data, and achieves more compact and lower cost systems. This approach allows the use of slower CPU's and RAM type me…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.