Data processing system including programming voltage inhibitor for an electrically erasable reprogrammable nonvolatile memory
US5566323A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 24, 1994 |
| Grant date | Oct 15, 1996 |
| Priority date | — |
| Expiry date | Oct 24, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/225
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system is provided which includes at least one processing unit and at least one nonvolatile memory which is electrically erasable and reprogrammable at least under the partial control of the processing unit, with the system further including a reinitialization request signal detector which is operatively connected to a programming voltage inhibitor which is capable of inhibiting or preventing the application of at least one signal (V.sub.pp, WE, EE) to the nonvolatile memory, the signal being necessary for the programming of the nonvolatile memory, the reinitialization request signal detector operating to control the inhibitor such that the signal is inhibited from being applied to the nonvolatile memory at least when the reinitialization request signal is detected at a level sufficient to activate reinitialization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.