Method of forming contamination guard ring for semiconductor integrated circuit applications
US5567643A · kind A · utility
21Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 31, 1994 |
| Grant date | Oct 22, 1996 |
| Priority date | — |
| Expiry date | May 31, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The guard ring is a barrier which prevents contaminates from diffusing through a window opening through insulating layers to adjacent semiconductor devices. The guard ring is formed surrounding a window in the insulation layers over a fuse link or an alignment mark. The guard ring is an annular metal ring that penetrates two or more insulating layers and contacts the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.