Flash memory wear leveling system providing immediate direct access to microprocessor
US5568423A · kind A · utility
227Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1995 |
| Grant date | Oct 22, 1996 |
| Priority date | — |
| Expiry date | Apr 14, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for equal utilization of blocks of flash memory whereby a processor using algorithmic software functions to sort the usage-value of each block of flash memory so that the system will select the least-used memory block for the next cycle of memory usage. The described system provides direct and immediate access of flash memory to the microprocessor without any intermediate modules or vias which would delay that access. Further, a minimal amount of overhead header information is only required for each flash memory block thus allowing greater areas of memory usage for instructional code data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.