Storage control method and apparatus for highly reliable storage controller with multiple cache memories
US5568628A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Dec 14, 1993 |
| Grant date | Oct 22, 1996 |
| Priority date | — |
| Expiry date | Dec 14, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage control unit is connected between a central processing unit having an interface for accessing a first disk unit into which data constructed of a plurality of variable length data records are stored in a first recording format, and a second disk unit into which data constructed of a plurality of fixed length data blocks are recorded in a second recording format. The storage control unit contains a plurality of first-level storage regions having a storage capacity equal to a track of the first disk unit, and the first-level storage regions have a plurality of cache memories constructed of a plurality of second-level storage regions having storage capacities equal to the fixed length blocks in the second recording format. In response to a data update request issued from the central processing unit, a control processor within the storage control unit judges whether or not the data of the fixed length data blocks containing the data records to be updated in the first recording format, are present in each of these cache memories. When there is such a cache memory having no data, the data of the fixed length data blocks containing the variable length data records to be updated a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.