Thermal isolation of hybrid thermal detectors through an anisotropic etch
US5572059A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Nov 5, 1996 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/1843
Abstract
A thermal isolation structure (10) is disposed between a focal plane array and an integrated circuit substrate (12). The thermal isolation structure (10) includes a mesa-type formation (16) and a mesa strip conductor (18, 26) extending from the top of the mesa-type formation (16) to an associated contact pad (14) on the integrated circuit substrate (12). After formation of the mesa-type formation (16) and the mesa strip conductor (18, 26), an anisotropic etch using the mesa strip conductor (18, 26) as an etch mask removes excess mesa material to form trimmed mesa-type formation (24) for improved thermal isolation. Bump bonding material (20) may be deposited on mesa strip conductor (18, 26) and can also be used as an etch mask during the anisotropic etch. Thermal isolation structure (100) can include mesa-type formations (102), each with a centrally located via (110) extending vertically to an associated contact pad (104) of integrated circuit substrate (106). A conductor (108) is deposited on top of mesa-type formation (102), along the walls of via (110), and overlaying contact pad (104). An anistropic etch using the conductor (108) as an etch mask removes excess mesa material (118…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.