Image scanning device having direction-responsive programmable delay mechanism
US5572338A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 1994 |
| Grant date | Nov 5, 1996 |
| Priority date | — |
| Expiry date | Oct 18, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/486
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A scanner control circuit comprises a digital line delay memory and a control circuit coupled to the digital line delay memory. The control circuit receives digital multi-channel image data having a channel-to-channel delay and corrects for said channel-to-channel delay. Each channel's image data is written into the digital line delay memory at an address in the digital line delay memory corresponding to the correct line number and is then read out of the digital line delay memory for processing. The scanner control circuit operates to allow scanning of an object bi-directionally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.