Decision directed carrier recovery circuit using phase error detector
US5572550A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 20, 1994 |
| Grant date | Nov 5, 1996 |
| Priority date | — |
| Expiry date | Dec 20, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3827
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A decision directed carrier recovery circuit comprising a demodulator for adjusting a frequency and a phase of an input carrier to demodulate an original signal therefrom, a signal decision unit for deciding an output signal from the demodulator as a specified symbol, and a phase error detector for receiving the output signal from the demodulation and an output signal from the signal decision unit and detecting an phase error between the received signals using bit shifting instead of division. The phase error detector includes a numerator calculator for receiving the output signal from the demodulator and the output signal from the signal decision unit and calculating a numerator of a phase error calculation expression on the basis of addition and multiplication, a logic combination unit for logically combining first and second components of the output signal from the signal decision unit, and a multiplexer for inputting through a plurality of input terminals values obtained by bit-shifting an output value from the numerator calculator respectively with respect to all possible values of a denominator of the phase error calculation expression and selecting one of the inputted values…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.