Method of fabricating a thin film transistor wherein the gate terminal is formed after the gate insulator
US5573958A · kind A · utility
10Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1994 |
| Grant date | Nov 12, 1996 |
| Priority date | — |
| Expiry date | Nov 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating a thin film transistor of an inverted stagger structure having a gate terminal, a gate insulator a semiconductor film, a source electrode and a drain electrode formed in that order; a gate terminal and a gate wiring are provided for supplying a scanning signal to the gate electrode; and a source terminal and a source wiring are provided for supplying a data signal to the source electrode, wherein the gate terminal is formed on an upper side of the gate insulating film and electrically connected to the gate wiring through a contact hole formed in the gate insulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.