Method and apparatus for performing bi-endian byte and short accesses in a single-endian microprocessor
US5574923A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 1993 |
| Grant date | Nov 12, 1996 |
| Priority date | — |
| Expiry date | May 10, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4013
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for performing bi-endian byte and short accesses in a single endian microprocessor. The present invention is used in a microprocessor or in a microprocessor in a computer system. The present invention provides a single endian microprocessor that promotes sub-word accesses to word accesses with a means for manipulating the two least significant bits of the access address to point to the correct sub-word data returned during an access to bi-endian external memory. The method for manipulating the address bits is also used to allow a single endian data cache to operate with the bi-endian external memory. The two LSBs of the address are manipulated such that the pointer values are A1# and A0# for word promoted byte accesses or cacheable accesses. For word promoted short accesses or cacheable accesses, the pointer values are A1# and A0. The present invention offers increased flexibility in interfacing a single-endian microprocessor with bi-endian systems. The present invention provides easy interfacing without undue or overly complex modifications to existing circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.