Method for fabricating semiconductor device with chemical-mechanical polishing process for planarization of interlayer insulation films
US5575886A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 17, 1995 |
| Grant date | Nov 19, 1996 |
| Priority date | — |
| Expiry date | Jul 17, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/98
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method for fabricating a semiconductor device disclosed is one in which an insulation film is formed on a metal interconnect by an Electron Cyclotron Resonance Chemical Vapor Deposition (ECR CVD) process capable of applying a radio frequency bias to a substrate, a surface of the insulation film is planarized by a chemical-mechanical polishing (CMP) process, and a surface of the insulation film is cleaned. The ECR CVD process capable of applying a radio frequency bias to a substrate may be a radio frequency bias plasma CVD process or a bias sputtering process. The cleaning of the surface of the insulation film may use a hydrogen fluoride solution. It is easy to control processes without increasing the number of process steps and a high degree of planarization can be realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.