Process for through-hole plating of two-layer printed circuit boards and multilayers
US5575898A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 1995 |
| Grant date | Nov 19, 1996 |
| Priority date | — |
| Expiry date | Sep 20, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0796
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Process for through-hole plating of printed circuit boards and multilayers by applying a conductive layer of a polythiophene onto the walls of the through-holes and electrodeposition of copper onto the walls of the through-holes, characterized in that a microemulsion of a monomeric thiophene of the formula (I) is used to form the conductive polythiophene layer, ##STR1## in which X denotes oxygen or a single bond, PA0 R.sub.1 and R.sub.2 mutually independently denote hydrogen or a C.sub.1 -C.sub.4 alkyl group or together form an optionally substituted C.sub.1 -C.sub.4 alkylene residue or a 1,2-cyclohexylene residue, and in that the conductive layer of polythiophene is produced on the walls of the through-holes by subsequent or simultaneous treatment with acid and, finally, a metal is electro-deposited on this conductive base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.