Digital data modulation/demodulation system wherein the modulated data satisfies a minimum run number of zeros
US5579003A · kind A · utility
8Cited by
5References
18Claims
0Family size
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Key dates
| Filing date | Apr 1, 1994 |
| Grant date | Nov 26, 1996 |
| Priority date | — |
| Expiry date | Apr 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M5/145
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital data modulation system having, a separator for separating a consecutive binary data sequence to four-bit code-words, a four-to-nine ([4,9]) converter for converting the four-bit code-words into nine-bit modulated code-words and a code selector for selecting a code among nine-bit code-words containing minimum three bits of "0" between a preceeding bit of "1" and its following bit of "1" so that there should not be less than two consecutive bits of "0" between a selecting code and a modulated code-word which is to be converted later by the [4,9] converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.