Picture processing system
US5579052A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 24, 1994 |
| Grant date | Nov 26, 1996 |
| Priority date | — |
| Expiry date | May 24, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system that processes compressed data arriving in packets corresponding to picture blocks, the packets being separated by headers containing decoding parameters of the packets. A memory bus is controlled by a memory controller to exchange data between the processing elements and a picture memory. A pipeline circuit contains a plurality of processing elements. A parameter bus provides packets to be processed to the pipeline circuit, as well as the decoding parameters to elements of the system. The parameter bus is controlled by a variable length decoder that receives the compressed data from the memory bus and that extracts the packets and the decoding parameters therefrom.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.