Method and apparatus for improving the apparent accuracy of a data receiver clock circuit
US5579348A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 1994 |
| Grant date | Nov 26, 1996 |
| Priority date | — |
| Expiry date | Feb 2, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0632
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The apparent accuracy of a clock circuit used to recover timing and transmitted information signals in a data receiver is improved. A timing relationship inherent in a received signal is detected prior to the acquisition of a timing component embedded in a desired information portion of the received signal. The timing relationship has an accuracy that is greater than the accuracy of the clock circuit. The clock circuit is controlled in response to the timing relationship to operate with an improved range of accuracy. Thereafter, the embedded timing component is acquired and used to control the clock circuit. In an illustrated embodiment, the timing relationship is derived from a symbol rate of the received signal. In an alternate embodiment, the timing relationship is obtained from a separate transmitted reference signal, such as a transmitted television signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.