System and method for peripheral data transfer
US5581669A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 3, 1993 |
| Grant date | Dec 3, 1996 |
| Priority date | — |
| Expiry date | Dec 3, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for increasing the rate of data transfer from a host computer to a peripheral such as a printer without the need for special hardware within the host computer or a special interface cable coupling the host computer to the peripheral. Data is transferred from the host computer to the peripheral in 4 Kbyte bursts. Handshaking occurs between the host computer and the peripheral only between bursts. Bytes of peripheral data are apportioned into multiple bytes of data within the host computer. The multiple bytes are transmitted from the host computer to the peripheral, each transmitted byte containing a data clock and several bits of peripheral data. In one embodiment, the peripheral data byte is apportioned into two bytes within the host computer with each byte having a pair of clock signals transmitted along with the peripheral data portion. In another embodiment, three bytes of peripheral data are apportioned into four bytes within the host computer with each byte having a single clock signal transmitted along with the peripheral data portion. Within the peripheral, a clock circuit detects the clock signal from each transmitted byte and generates a delayed signal …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.