Automatic clearing of power supply fault condition in suspend system
US5581692A · kind A · utility
17Cited by
12References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1994 |
| Grant date | Dec 3, 1996 |
| Priority date | — |
| Expiry date | Sep 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system having a CPU, a switch, a power supply, and power supply control logic for controlling the state of the power supply via a control signal. The power supply control logic comprises circuitry to interface control of the power supply between the CPU and the user via the switch. The power supply control logic further comprises a fault circuit that detects a fault condition in the power supply and negates the control signal, thereby clearing the fault condition in the power supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.