Fully integrated, ramp generator with relatively long time constant
US5585752A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 1995 |
| Grant date | Dec 17, 1996 |
| Priority date | — |
| Expiry date | Mar 29, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/405
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for dividing a reference current is composed of a number n of transistors connected in cascade, in a Darlington configuration, between current generator and a fractionary current output node and by N+k (where k is an integer different from zero) directly biased diodes in series, connected between the generator and the fractionary current output node. The circuit does not employ current mirrors, so all transistors may have the minimum size, which also minimizes the effects of leakage currents. Additionally, compensation elements may be used for compensating the leakage currents from the base regions of the transistors. The circuit is useful as a capacitance multiplier, or as a slow ramp generator in a large number of design situations. Independence from intrinsic parameters of the transistors used and/or from temperature of operation may be provided by employing a specifically designed reference current generator. Several embodiments are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.