Memory organizing and addressing method for digital video images
US5585863A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1995 |
| Grant date | Dec 17, 1996 |
| Priority date | — |
| Expiry date | Apr 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/907
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for organizing and addressing memory of a digital video image is provided for one and two dimensional image processing using fast page mode accessing of memory, and also for displaying composite digital video images. A DRAM (12) is mapped to address locations storing segmented memory, non-segmented memory, line pointer tables, and horizontal description tables. The lines of a digital image are organized in DRAM (12) in either segmented memory or non-segmented memory. For segmented memory, each line of the image is broken up into equal line segments of pixels. Vertically aligned columns of line segments in the image are then stored in one or more rows of the DRAM (12). For non-segmented memory, each line is stored in a format where rows of DRAM (12) each represent a line of image data. To provide a means of locating the lines of the image, a line pointer table is stored in the DRAM (12) having entries corresponding to the location in memory of the start of each line of the image, and an indicator in each entry indicating whether a line is segmented or non-segmented. Two dimensional processing of an image in segmented memory is facilitated by fast page mode accessing since b…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.