Computer implemented method for generating an integrated circuit design
US5586046A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 1994 |
| Grant date | Dec 17, 1996 |
| Priority date | — |
| Expiry date | Oct 28, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer implemented method for generating an integrated circuit design (11) is provided. A description of a circuit (16) is provided in a format such as a Hardware Description Language (12). A functional simulation (17) of the description is run to determine functionality of the circuit. A netlist conversion (18) converts the description to a netlist comprising both a single-ended and differential circuit. The netlist conversion (18) converts the description to a single-ended description (24), replaces single-ended cells with differential cells and interconnects the differential cells (25), and exchanges terminals of the differential cells to maintain logic equivalence (26). A simulation with timing (19) is run on the netlist to verify timing characteristics of the circuit. The netlist is then provided to a router to generate a physical circuit layout (20) having both single-ended and differential circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.