Information processing apparatus capable of holding storage contents of PSRAM even when system clock comes to abnormal halt
US5586287A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 1995 |
| Grant date | Dec 17, 1996 |
| Priority date | — |
| Expiry date | May 9, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides an information processing apparatus which is equipped with PSRAM (pseudo static random access memory) having a self-refresh mode and which is capable of holding storage contents of the PSRAM even when a CPU system clock generator comes to an abnormal halt. The information processing apparatus has a self-refresh setter which produces an output signal of a high or low specific level when the system clock generator is oscillating, and which, when the system clock generator stops oscillation, inverts the level of the output signal after a certain time elapse since the stop of oscillation. The information processing apparatus further has logic circuits for holding a chip-enable signal at a level representing that the PSRAM is not accessed, and holding a refresh signal at a level representing that the PSRAM is refreshed, respectively, after a certain time elapse since the system clock generator stops oscillation, based on an output of the self-refresh setter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.