DC restoration circuit
US5587681A · kind A · utility
31Cited by
2References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 18, 1994 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Oct 18, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a D.C. restoration circuit for a digital FM radio receiver, in which demodulated signals may be presented at the output of the demodulator as low-level differential signals superimposed on a variable D.C. level, the differential signal paths are capacitively coupled to the inputs of a comparator, and the voltage excursions at these inputs are clamped when the voltage between the inputs exceeds a predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.