Multiplier based transconductance amplifiers and transconductance control circuits
US5587687A · kind A · utility
23Cited by
3References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 2, 1995 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Feb 2, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45652
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Multiplier based transconductance amplifiers utilizing the combination of FET differential input stages and Gilbert multiplier output stages are disclosed. The amplifiers provide a high input resistance, high output resistance, and wide g.sub.m adjustment range without need for output level-shifting stages. Also disclosed are various transconductance control circuits which require only a simple one-transistor voltage buffer in the feedback loop rather than the two more complex voltage amplifiers required by the prior art. Various embodiments are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.