Nonvolatile semiconductor memory with NAND structure memory arrays
US5587948A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 1995 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Jun 14, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell section is divided into a data storage area and a data management information storage area in a column direction. The number of memory cells of each of NAND strings of the data management information storage area is smaller than that of memory cells of each of NAND strings of the data storage area. Word lines are connected in common to NAND strings arranged in the column direction in the data storage area, and two of them extend to be connected in common to the NAND strings arranged in the column direction in the data management information storage area. Bit lines are connected in common to the NAND strings arranged in the row direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.