Integrated circuit memory device with voltage boost
US5587960A · kind A · utility
53Cited by
5References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 15, 1995 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Nov 15, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit memory device is provided with a voltage boost facility. The voltage boost facility is used with a so-called divided wordline architecture, in which a wordline is divided into independently addressable sub-wordlines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.