Register block circuit for central processing unit of microcomputer
US5588133A · kind A · utility
5Cited by
1References
5Claims
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Assignee
Inventors
Key dates
| Filing date | Jun 2, 1995 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Jun 2, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a register bank circuit includes a register array for storing data. The register array has a matrix structure which is formed of a plurality of banks arranged in a row of the matrix structure and a plurality of registers arranged in a column thereof. A bank selector selects one of the banks while the one to be selected is specified. A register selector selects one of the registers in the one bank selected by the bank selector means, so that the selected register is coupled to a bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.