Method for simulating a circuit
US5588142A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 12, 1995 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | May 12, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved circuit simulator for simulating the response of a circuit to a transient. The stimulating signal is represented by one or more carriers having time varying modulation envelopes. The simulator differs from a harmonic balance simulator in that the currents provided by each of the device subroutines include an additional term at each carrier frequency having the time dependency of the modulation envelope at that frequency. These additional current terms necessitate a time-domain solution of the simulation problem; however, the time steps are now determined by the time variation of the envelope instead of the time variation of the carrier. As a result, the number of time steps needed in the simulation is greatly reduced. The present invention may be implemented by modifying a conventional harmonic balance simulator. The modifications involve adding code to the various device routines to provide the current term corresponding to the modulation envelope. In the preferred embodiment of the present invention, either a charge term or a current term that depends on present and past values of the modulation envelope is provided by each device routine. The sum of the charge terms …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.